The Analog circuit design engineer will play key role in developing IBM's next generation Ultra high speed serial IO link (HSS) interface for Cognitive MLDL and data center applications using IBM main frame servers.
The engineer will be involved in the design and development full custom analog circuits for ultra high speed 32G/50G/112GÂ Serdes IO link interface.
1. Design and development of key full custom analog blocks/sub blocks for Tx /Rx/PLL/CLK Distribution modules for 32G/50G/112G IO links and  general purpose IO transceiver macros for PCIe optical IO interfaces using industry's latest 7nm / 14nm FinFet technology.
2. Complete ownership of analog macro development starting from
- understanding data sheet specifications
- driving/creating design specifications for macros
- defining architecture
-Â design analog sub blocks/modules
- creating simulation plan and execute
- developing floorplan for macro
- working closely with layout engineers for layout
- good understanding of EM/IR/Self heating issues and mitigation
- understanding layout extraction methodology and perform post layout simulation and
- deliver the macro to global stake holders with good quality.
3. Thorough electrical device level understanding of 7nm/14nm FinFET process
4. Good understanding of analog circuit design and simulation methodology CAD tool flow for 7nm/14nm process
5. Participate in concept schematic and final design reviews for circuit blocks with global stake holders.
6. Plan design work with constraints on performance power time and quality.
7. Proper documentation of design work.
8. Work closely with test characterization team during chip characterization/yield analysis.
- The Analog circuit design engineer with experience in next generation Ultra high speed serial
IO link (HSS) interface for Cognitive MLDL and data center applications.
- The engineer needs to have knowledge in the design and development full custom analog circuits for ultra high speed 32G/50G/112G Serdes IO link interfaces.
- Current mode logic circuits
- voltage/current sources current mirrors bandgap voltage circuits
- High speed IO push-pull drivers pre-driver
- High speed IO Tx - serializer FFE SST drivers with impedance calibrations
- High Speed IO Rx - CTLE VGA DFE deserializer
- General Purpose IO modules like tristate IO drivers and receivers clock drivers and receivers
- Experience in 3nm 5nm 7 and 14 nm analog circuit design.
- Quick learner deep circuit design knowledge problem solving skills and good communication skills.
- Working on Cutting edge technology and HSS domain.
- Quick learner deep circuit design knowledge problem solving skills and good
- Good tool knowledge of Cadence virtuoso and specter simulator
- Good device knowledge of GAA Finfets with self-heating minimization in 2nm and 5nm Finfet technologies