SEIT & Design IPT Lead (IPT2)

Job Title: SEIT & Design IPT Lead (IPT2)

Job Location: Salt Lake City, UT

Job Code: 11035

Job Schedule: 9/80, every other Friday off

Job Description:

This position is the Infrastructure IPT Lead for the Next Generation Jammer-Low Band (NGJ-LB) program. The Infrastructure IPT Lead reports directly to the Engineering Director/Chief Engineer of the NGJ-LB program.

This position will be responsible for leading all aspects of the infrastructure IPT efforts on the program including interfacing with the customer, pod structure design and development, power generation design and development, thermal management design and development, and coordination across IPTs, and future related proposal efforts.

The NGJ-LB progam will replace the Navy's legacy ALQ-99 Tactical Jamming System hosted on the EA-18G Growler aircraft. More details about the program can be found at the following link:

https://www.l3harris.com/all-capabilities/next-generation-jammer-low-band-ngj-lb

Essential Functions:

• Experience leading teams in the development, integration, and test/verification of classified defense-related systems.
• Highly organized, with the ability to manage, track, and report relevant progress metrics.
• Identify risks and propose mitigations when necessary.
• Deliver highly technical messages/presentations communicating at the level of the audience.
• Experience leading major subcontractor development efforts
• Active DoD Secret clearance with investigation within the last 5 years.

• Qualifications:

• Bachelor's Degree with a minimum of 15 years of prior related experience. Graduate Degree with a minimum of 12 years of prior related experience. In lieu of a degree, minimum of 18 years of prior related experience.

Preferred Additional Skills:

• Experience leading SEIT teams in a new product development.
• Ability to integrate the efforts of all aspects of SEIT and design with an agile approach.
• Hardware and software lab development experience.
• Electrical engineering experience (RF, digital, signal processing).
• Software or Hardware Description Language (HDL) design and development experience.
• Earned Value Management experience in both budgeting and schedule planning.
• Model-based design experience, preferably with SysML using Cameo Systems Modeler.
• Experience leading software and/or VHDL development teams.
• Experience leading software test teams.
• Experience leading hardware/software integration & test.
• Agile system development experience.
• DoD proposal experience.

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