Senior DFT Engineer

About Us

Axelera AI is not your regular deep-tech startup. We are creating the next-generation AI platform to support anyone who wants to help advancing humanity and improve the world around us.

In just four years we have raised a total of $120 million and have built a world-class team of 220+ employees (including 49+ PhDs with more than 40000 citations) both remotely from 17 different countries and with offices in Belgium France Switzerland Italy the UK headquartered at the High Tech Campus in Eindhoven Netherlands.

We have also launched our Metis™ AI Platform which achieves a 3-5x increase in efficiency and performance and have visibility into a strong business pipeline exceeding $100 million.

Our unwavering commitment to innovation has firmly established us as a global industry pioneer.

Are you up for the challenge?

Position Overview

We are looking for a Senior DFT Engineer to join our multicore in-memory-compute SoC team.

You will design implement and validate test solutions for our complex SoCs collaborating with a talented team of engineers across Europe. This is your chance to work on cutting-edge architectures improve silicon testability and make a real impact in a fast-moving startup environment.

Key responsibilities:

• Implement scan insertion ATPG Memory BIST JTAG/IJTAG and fault simulation flows.

• Collaborate with RTL verification and physical design teams to integrate DFT solutions efficiently.

• Support silicon bring-up and debug helping to optimize test coverage and yield.

• Contribute to methodology improvements and share best practices with team members.

Qualifications:

• Experience: minimum of 5 years in DFT engineering preferably with complex SoC projects.

• Skills: SystemVerilog RTL TCL Python Unix/Linux workflows.

• Core Knowledge: Hierarchical scan ATPG Memory BIST JTAG/IJTAG fault simulation silicon debug gate-level verification.

• Tools: Siemens Synopsys or Cadence DFT tool experience.

• Bonus: Familiarity with IEEE 1149.x / 1500 / 1687 standards synthesis flow timing analysis.

• Strong problem-solving skills collaboration and passion for semiconductor innovation.

Location

We offer a flexible working arrangement with options to:

• Work from one of our Axelera AI offices (Leuven in Belgium Amsterdam and Eindhoven in the Netherlands Zurich in Switzerland Florence and Milan in Italy or Bristol in the United Kingdom) if you're already based in the vicinity.

• Work fully remotely from any European country (incl. the UK) you are already in.

• Relocate with us and work from Italy (Florence or Milan) or the Netherlands (Amsterdam or Eindhoven).

Kindly note that priority will be given to candidates who are [interested in being] based in Belgium or Italy.

What we offer

This is your chance to shape and be part of a dynamic fast-growing international organization. We offer an attractive compensation package including a pension plan extensive employee insurances and the option to get company shares.

An open culture that supports creativity and continual innovation is awaiting you. Collaborative ownership and freedom with responsibility is characteristic for the way we act and work as a team.

At Axelera AI we wholeheartedly embrace equal opportunity and hold diversity in the highest regard. Our steadfast commitment is to cultivate a warm and inclusive environment that empowers and celebrates every member of our team. We welcome applicants from all backgrounds to join us in shaping the future of AI.