Senior Lead CPU RTL Designer

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
• 10 years of experience in logic/RTL design.
• Experience with modern processor microarchitecture and related technologies/algorithms, microarchitecture definition and RTL design.
• Experience with modern high-frequency CPU design implementation results, front-end design, power analysis tools for CPU, and ARM Instruction Set Architecture.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering or Computer Science.
• 15 years of experience in semiconductor industry.
• Experience leading a team for part of a processor frontend design, for ARM based modern processors.
• Knowledge of general purpose operating systems such as Linux and Android.

About the job

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Additional Information:

The US base salary range for this full-time position is $216,000-$317,000 bonus equity benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target for new hire salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google .

Responsibilities

• Develop CPU front-end designs, emphasizing on microarchitecture and RTL design for the next generation CPU.
• Propose performance enhancing microarchitecture features, and work with Architects and Performance teams for trade-off studies. Communicate the pros and cons of microarchitecture enhancements.
• Deliver designs meeting PPA goals with production quality.
• Become familiar with modern techniques, interpret the techniques into design constructs, and languages in order to provide guidance to and participate in the performance modeling effort.
• Work with the Functional Verification team to ensure production of quality designs, and the physical design team to meet frequency, power, and area goals.