Analog Layout Engineer

Introduction
IBM is looking for a dedicated and skilled Physical Design Engineer to join our team in Bangalore. In this role you will be responsible for the high-performance microprocessor sub system implementation and timing closure. You’ll be a key contributor to our innovative technology solutions ensuring that designs meet timing power and area budgets. As a part of our dynamic team you will also play a crucial role in implementing engineering change orders (ECOs) to address functional bugs and timing violations. We value team players with strong problem-solving and communication skills who are ready to make a significant impact in shaping the future of technology.

Your Role and Responsibilities

• Responsible for high performance microprocessor blocks RTL to GDSII implementation
• Perform block level synthesis floorplanning placement and routing.
• Close the design to meet timing power budget and area.
• Implement ECO’s to address functional bugs and timing violations
• Team player with good problem solving and communication skills.

Required Technical and Professional Expertise

• 3-8 years industry experience in physical design methodology.
• Good knowledge and hands on experience in physical design methodology which include logic synthesis placement clock tree synthesis routing.
• Should be knowledgeable in physical verification (LVSDRC.. etc) Noise analysis Power analysis and electro migration.

Preferred Technical and Professional Expertise

• Team player with good problem solving skills communication skills and leadership skills.