Analog Mixed-Signal Chip Lead Engineer
Job Description
In this role, you will be a key member of the analog team architecting the world's first photonic computers. This is fundamentally an interdisciplinary team, and outside-the-box thinking is the daily norm. You will need both deep expertise in mixed-signal and analog design and breadth across other engineering disciplines, such as photonics and digital electronics, semiconductor device physics, thermal/packaging, and machine learning. The successful candidate will demonstrate an eagerness to refresh and grow their competency in these areas.
*We are open to hiring a candidate in the Boston, MA or Mountain View, CA areas for this role.
Responsibilities
- Support micro-architecture development with chip architects by conducting feasibility studies
- Collaborate with members of our design engineering teams (packaging, digital, analog, photonics) to define chip partitions
- Responsible for the top-level design including schematic/layout hierarchy and floor planning
- Work cross-functionally with analog, digital, and photonics block designers to integrate circuit IPs
- Plan for Power Delivery Network (PDN) and support its design implementation
- Plan for ESD strategy and support its design implementation
- Plan for Test strategy and support its design implementation
- Oversee the layout and verify the design to ensure a successful tape-out
- Work with Program Managers to meet the deliverable timelines at various stages in the product development
- Define production and bench-level test plans
- Validate performances of the circuits in the lab
Requirements
- MS with 12+ years of relevant experience, OR Ph.D. with 8+ years of experience
- Semiconductor industry experience in Analog/Mixed-signal IC design
- Deep understanding of analog and mixed signal circuit design including CMOS device characteristics, noise, mismatch, linearity, and design trade-offs
- Experience leading the design of multiple analog/mixed-signal chips and their tape-outs
- Experience with mixed-signal mode verification methodologies
- Experience with integration flows and their challenges
- Familiarity with packaging effects, supply isolations, ESD structures, and high-frequency circuit layout for optimum performance
- Experience designing chips with 2.5/3D packaging is a plus
- Working knowledge of RTL, PnR, Modeling, and Design verification flows is a plus
- Experience with Cadence Design Environment
- Experience testing analog circuits in a lab environment
- Strong ability to work collaboratively with people across multiple functional areas
Benefits
- Comprehensive Health Care Plan (Medical, Dental & Vision)
- 401k matching
- Life Insurance (Basic, Voluntary & AD&D)
- Generous Time Off (Vacation, Sick & Public Holidays)
- Paid Family Leave
- Short Term & Long Term Disability
- Training & Development
- Flexible, hybrid workplace model
- Stock Option Plan
Base Compensation Range: $220,000 to $280,000. In accordance with the Colorado, California and New York law, the range provided is Lightmatter's reasonable estimate of the compensation for this role. Actual pay will be based on several factors including work experience, location and education.
Lightmatter recruits, employs, trains, compensates and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.
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Date Posted
09/10/2023
Views
4
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