Analog/Mixed Signal Design Verification - Intern
Job Description
The Allegro team is passionate about providing intelligent solutions that move the world toward a safer and more sustainable future. With more than 30 years of experience developing advanced semiconductor technology, innovation with purpose touches every aspect of our business. From customer engagement and employee recognition to technology advancement and serving the local communities in which we maintain offices, innovation consistently drives our mission and definition of success.
As part of our innovation, we recognize that our team members are unique and that our work locations must be adaptable. At Allegro we flex. Flex@Allegro is our approach to hybrid work that empowers managers and their team members to decide where and when work will be done. Ask what Flex@Allegro can mean for you.
Want to use your mixed-signal verification expertise to help create a safer, more sustainable world? At Allegro MicroSystems, we're developing sensor technologies that power innovation in automotive, industrial, and consumer electronics. Join our collaborative and supportive design team in Prague, where you'll have the flexibility to learn and grow in a dynamic environment.
Summary
Launch your mixed-signal verification career with a challenging, rewarding, long-term, and paid internship at Allegro MicroSystems! Work alongside experienced engineers in our Prague Design Center, designing cutting-edge integrated circuit solutions used in the automotive industry!
What we can give you
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Learn how to verify complex Integrated Circuits using Mixed-Signal simulation techniques.
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Understand how an integrated circuit works from system level down to transistor level
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Get familiar with Integrated Circuits development process from specification to manufacturing
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Gain practical experience with industry-standard mixed-signal verification tools, including Cadence AMS Designer.
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Develop test benches and test cases to verify compliance of the design with the specification
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Collaborate on real-life projects with teams spread worldwide
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Potential to complete your Diploma Thesis with us under the supervision of skilled engineers.
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Flexible work hours – you are paid per hour.
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Friendly work environment.
Essential Requirements
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Curious about mixed-signal verification and a desire to learn and grow.
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Foundational understanding of analog and digital design principles.
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Basic knowledge of a mixed-signal modeling language like Verilog-AMS, SystemVerilog or VHDL-AMS.
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Communication and teamwork skills.
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We welcome applications from students in their Master's program.
Date Posted
10/03/2024
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