Application Engineer (Custom Analog) - Design Enablement

Job Details:

Job Description:

At Intel, Design Enablement (DE) is one of the key pillars enabling Intel to deliver winning products in the marketplace. You will directly drive and work with DE cross teams to ensure design-kit leadership for customer enablement on cutting edge technologies, our customers to outline critical requirements, and collaborate with internal partners to define the scope, plan execution, innovate competitive solutions to meet customer needs. This support role will drive the solutions for Custom/Analog collateral/tools/flows for customers using Intel PDK. In addition, you will lead the collaboration and communication across TD/DE organizations to find the best path to resolve the issue. Tasks include owning/maintaining training documents, user guide, and customer ticket support.

As a key member of DEAS (Design Enablement Application and Support), you will need to leverage your communication skills to interact with customers directly, apply analytical problem-solving capability to identify the key requests, root-causing the issues, and team with DE stakeholders to support and enable customer success.

Your role and knowledge will focus on these areas:

- Custom layout/Custom flows domain to be able to understand and apply the technical concepts, systems, development methods, and drive solutions for the customer.

- Frame the project objectives, focuses, and navigates effort to solve problems, remove roadblocks, manages risks, schedules, drives recommendations to align senior management.

- Oversees identification of tasks and research, dependencies, communicates expectations to team members.

- Ensures appropriate progress against schedule and takes remedial action as appropriate.

- Manages interdependencies and integration among multiple teams, and stakeholders.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Candidate must possess a BS degree with 3+ years of experience or MS degree with 2+ years of experience in Electrical Engineering, Computer Engineering, or related STEM field.

3+ years of experience in two or more of the following:

• Semiconductor device physics.
• Circuit simulation and custom analog flows and methodologies.
• Internal Intel or External Design Kit (PDK) Experience
• Custom analog tool suite usage such as Cadence ADE or similar tool suite.
• Basic scripting/automation experience.

Preferred Qualifications:

1+ years of experience in the following:

• Analog layout
• Python or Perl for Automation Validation.
• Foundry experience.
• SKILL Language
• External EDA vendor interaction.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Arizona, Phoenix

Additional Locations:

US, California, Santa Clara, US, Oregon, Hillsboro, US, Texas, Austin

Business group:

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html

Annual Salary Range for jobs which could be performed in

US, California:$123,419.00-$185,123.00

Salary range dependent on a number of factors including location and experience.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.