Asic Engineering Manager

Summary

The ideal candidate will be a consensus driven leader with management and leadership experience in small to large size organizations, with comprehensive system and silicon development experience, and a proven track record of first-pass success in ASIC and Systems.

Required Skills

Asic Engineering Manager Responsibilities:

• Manage an Algorithm Development and HW Modeling team responsible for various processing blocks in a SOC. Drive Algorithm development to meet product requirements, drive C/C++/SystemC cycle-accurate/bit-accurate models for Hardware Verification, drive performance models, participate in silicon architecture, micro-architecture development, interface with SW, FW, Design, Verification, Emulation, and Post-Silicon Validation teams
• Partner with internal and external cross-functional teams, across all levels of a corporation, from executives, team managers and individual contributors including development engineers, capacity planners and supply chain experts
• Contribute to and drive development of and maintain overall silicon strategy aligned to corporation's Long Range Plan objectives
• Collaborate with IP development teams, and participate in, and support soft and hard IP identification, selection and IP licensing
• Identify candidates, hire, schedule, support and train a team of ASIC engineers in order to develop products on time and on budget
• Contribute to, analyze, review SOWs from vendors, supporting documentation, requirements sets that meet the needs of internal customers
• Support engineering teams to define, debug, implement and deliver total solutions around purpose built ASICs
• Define, implement and maintain key performance indicators (KPI) for areas of responsibility Partner with technical program management and supply chain team members to manage external development partners, suppliers and vendors

Minimum Qualification

Minimum Qualifications:

• B.S. or M.S. degree in Computer Engineering or Electrical Engineering
• Experience managing Algorithm development and HW Modeling teams at the Director or Manager level
• Track record of first-pass success in ASIC and Systems Development
• Experience working across multiple projects and adjusting priorities in partnership with stakeholders
• Experience managing and delivering C/C++ cycle-accurate, bit-accurate, and transaction accurate models for hardware verification and debugging complex models
• Experience with interpreting functional specs and delivering hardware architectural models
• Clear understanding of complexities involved with C-modeling tools, including C/C++, SystemC and scripting languages such as Perl and/or Python

Preferred Qualification

Preferred Qualifications:

• Knowledge of video coding standards, signal processing algorithms, neural networks and machine learning concepts, and/or other neural network development framework

EOE

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