ATTD Undergraduate Engineer Intern

Intel Corporation · Phoenix – Mesa – Scottsdale, AZ

Company

Intel Corporation

Location

Phoenix – Mesa – Scottsdale, AZ

Type

Full Time

Job Description

Job Details:

Job Description:

We are looking for an energetic, passionate, creative Undergraduate Engineering Intern to join the ATTD Package Substrate Design Rule team. The intern will assist design rule engineers on projects to improve efficiency and quality of the design rule process. Projects will include working with CAD tools used for microelectronic packaging design; helping engineers with design; and helping to develop, test and implement design processes in newly adopted CAD tools. Skills learned will include basics of design rules for microelectronic packaging and an introduction to the basics of product package design.

The Assembly and Test Technology Development (ATTD) group at Intel develops industry-leading microelectronic packaging technologies for Intel's Client and Data Center CPUs, Graphics and Networking products, and Intel Foundry Services customers. As an intern in the ATTD Package Substrate Design Rule Owner (DRO) team you will join the centralized team at Intel responsible for definition, validation and deployment of design rules for package substrate design. The DRO collaborates with product design, substrate manufacturing and package assembly to identify and drive design rules that enable competitive product designs that meet cost and manufacturability requirements. As an intern in the DRO team you will have the opportunity to learn about these aspects of packaging technology and design as well as the opportunity to work across engineering disciplines.

This is a summer internship position.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position.

Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.

Knowledge and/or experience listed below would be obtained through a combination of your school work and/or classes and/or research and/or relevant previous job and/or internship experiences .

Minimum Qualifications:

  • Actively pursuing a Bachelor's Degree in Electrical Engineering/ Mechanical Engineering / Chemical Engineering or Physics/Materials Science.

Preferred Qualifications:

  • Experience with eCAD tools like Mentor Expedition, Cadence Allegro

Job Type:

Student / Intern

Shift:

Shift 1 (United States of America)

Primary Location:

US, Arizona, Phoenix

Additional Locations:

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Business group:

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Date Posted

05/15/2023

Views

13

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