FPGA/ASIC Verification Engineer

The hardware team at Hudson River Trading creates bleeding-edge, ultra-low latency products to support trading on markets worldwide. High performance designs require even higher performance verification.  At HRT, we're building the verification environment of tomorrow. We are lightweight and open source. Our ideal candidate is not only an ace tester but a practicing toolsmith. You know the EDA landscape and want to be part of a team actively working to rethink, redesign, and surpass the status quo.

We are looking for an experienced verification engineer who is skilled at writing testbenches to exercise complex hardware, likes being challenged, hates climbing corporate ladders, and doesn't mind the added bonus of having hard work rewarded through recognition and extremely competitive compensation. Hardware verification is part of a small but growing team at HRT which is integral to ensuring the success of our trading in the future. You can expect to always be challenged by the ever-changing financial markets as you work on critical hardware and software in an extremely fast-paced, real-time environment.

Skills

• Creating testbenches and tests
• Writing detailed verification plans
• Adapting UVM principles to an open source-based, highly flexible verification environment
• Collaborating directly with designers for rapid bringup of new projects and debugging of existing designs
• Managing regression and continuous integration infrastructure
• Developing and improving open-source and internal tools

Profile

• Excellent debug and analytical skills to quickly root-cause RTL bugs
• Strong background (4+ years) in RTL functional verification
• Experience with code and functional coverage collection/analysis
• Comfortable in a Linux environment
• Experience with Python is preferred
• Familiarity with Verilator and/or Cocotb preferred
• Experience with networking protocols preferred
• C++ experience is a plus
• You possess a bachelor's degree in Computer or Electrical Engineering or a related field

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