Hardware Machine Learning Engineer

IMC Trading

Hardware Machine Learning Engineer

Reposted 12 Hours Ago

2 Locations

Hybrid

200K-225K Annually

Senior level

Fintech • Machine Learning • Software • Financial Services

IMC is a proprietary trading firm powered by research and technology.

The Role

Design implement and deploy ML inference engines on custom FPGA/ASIC hardware. Perform HW/SW co-design with traders and researchers optimize neural networks for low latency and build quantization/compression tools to translate ML frameworks to RTL for rapid production deployment.

Summary Generated by Built In

We are deploying machine learning directly onto custom hardware - and we want you to help drive it from the ground up. This is an initiative where you'll have the rare opportunity to architect solutions from scratch influence technical research direction and see your work drive real impact in one of the most demanding computing environments in the world.
We build the hardware the software and the infrastructure so when you hit a bottleneck you can fix it - there's no vendor to wait on and no abstraction layer you're not allowed to touch. If you've ever wanted to push the boundaries of what's computationally possible this role is for you. We're looking for researchers and experienced engineers from any background. Trading experience is a bonus not a prerequisite.
Your Core Responsibilities

Architect and co-design ML models with traders quant researchers and software engineers treating hardware constraints (latency budgets resource limits numerical precision) as first-class design inputs
Shape our custom hardware roadmap by translating ML model requirements into concrete architectural decisions
Work hands-on with hardware engineers to implement verify and deploy ML inference solutions from proof-of-concept through production
Track and evaluate emerging research in neural architecture search machine learning systems and quantization methods and determine what translates to measurable improvements in our systems

Your Skills and Experience

Solid understanding of hardware constraints and design trade-offs (e.g. pipelining resource utilization fixed-point arithmetic) that shape how ML models can be efficiently mapped onto FPGAs or custom ASICs
Experience with hardware fundamentals whether through VHDL/SystemVerilog development HLS tools or ML-to-hardware frameworks like hls4ml FINN or Vitis AI
Understanding of machine learning fundamentals - neural network architectures inference optimization quantization techniques ML frameworks such as PyTorch/TensorFlow
Proficiency in Python C++ or similar languages for tooling testing and simulation
Strong communication skills and ability to work collaboratively across disciplines with both technical and non-technical teams

Nice to Have

Exposure to ML compiler infrastructure such as MLIR TVM XLA or similar tools for lowering and optimizing models for hardware targets
Background in latency-sensitive or resource-constrained systems including high-frequency trading particle physics data acquisition real-time signal processing or similar domains
Familiarity with functional verification methodologies (for example SystemVerilog UVM Cocotb)
Advanced degree (MS or PhD) in EE CS Physics or related field or equivalent depth through industry or research experience

Skills Required

Experience with FPGA or ASIC technologies
Proficiency in VHDL Verilog or SystemVerilog
Understanding of digital design principles including pipelining flow control and clock domain crossing
Experience with FPGA development tools and toolchains (Vivado Quartus Synplify etc.)
Understanding of machine learning fundamentals (neural network architectures inference optimization quantization techniques)
Experience optimizing inference for temporal or sequential ML models (RNNs Transformers state-space models) on resource-constrained or latency-sensitive platforms
Proficiency in Python C++ or similar languages for tooling testing and simulation
Strong communication skills and ability to work collaboratively across disciplines
Experience with High-Level Synthesis (HLS) or other hardware description languages beyond traditional RTL
Familiarity with ML-to-hardware frameworks such as hls4ml FINN or Vitis AI
Experience with ML-relevant compiler IRs and optimization passes (MLIR LLVM TVM XLA IREE)
Background in ultra-low-latency systems (HFT real-time signal processing particle accelerator DAQ etc.)
Experience with functional verification methodologies (SystemVerilog UVM Cocotb)
Advanced degree (MS or PhD) in Electrical Engineering Computer Science Physics or related field

What the Team is Saying

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The Company

HQ: Amsterdam

1954 Employees

Year Founded: 1989

What We Do

IMC is a global trading firm powered by a cutting-edge research environment and a world-class technology backbone. Since 1989 we’ve been a stabilizing force in financial markets providing essential liquidity upon which market participants depend. Across our offices in the US Europe Asia Pacific and India our talented quant researchers engineers traders and business operations professionals are united by our uniquely collaborative high-performance culture and our commitment to giving back. From entering dynamic new markets to embracing disruptive technologies and from developing an innovative research environment to diversifying our trading strategies we dare to continuously innovate and collaborate to succeed.

Why Work With Us

At IMC the best ideas win regardless of hierarchy. Graduates receive mentorship and make an impact from day one while experienced hires get to shape their own path in a flexible high-performance environment. We remove barriers so everyone can grow and help drive one of the world’s leading liquidity providers.