Physical Design Integration Engineer

Job Details:

Job Description:

Do Something Wonderful!

Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below!

• Life at Intel

• Diversity at Intel

Intel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first Open System Foundry model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient, and sustainable source of supply. This job opportunity in IFS will be part of the Customer Solutions Engineering (CSE) group which is responsible for the portions of the system foundry that brings the best of Intel technologies to IFS customers, differentiating and accelerating their solutions from architecture to post-silicon validation.

As a Physical Design Integration Engineer in IFS, your will:

• Be responsible for the physical design implementation and verification of a chip design, subsystem, or block including clocking, timing, and power delivery.

• Drive development of complex layout integrated circuit designs, simulation designs, RTL to GDS, logic synthesis, and oversees documentation for SoC development.
• Perform digital circuit design, verification and layout, data path design and digital block synthesis, place and route, sign-off through tape-out.
• Oversee physical design verification flow at block and chip level and makes recommendations to fix violations for current and future product architecture.
• Ensures schedule and landing zone requirements of the block, subsystem, or SoC are met.
• Drive results by inspiring people, role modeling Intel values, developing the capabilities of others, and ensuring a productive work environment.
• Work with broader execution team as well as with end customer/front end design teams to clarify and execute to targets.

Attributes:

• Excellent communication and project leadership skills.
• Self-driven with ability to prioritize work and accomplish tasks quickly with good problem solving skills.
• Must be detail oriented with solid written and verbal communication for expressing technical ideas and initiatives.
• Comfortable task switching and managing multiple tasks at the same time.

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

What we need to see (Minimum Qualifications):

• Bachelor or Master of Science degree in Electrical Engineering or Computer Engineering or related field of study.
• 5+ years of related industry experience.
• 2+ years of physical design integration experience.

How to Stand out (Preferred Qualifications):

• Post graduate degree Electrical Engineering, Computer Engineering, Computer Science, or in a related field of study.
• Demonstrate experience and hands-on practical knowledge with standard-cell based VLSI design methodology and relevant industry standard EDA tools.
• Experience with Synopsys Primetime or Cadence Tempus.
• Demonstrate strong analytical and problem-solving skills through relevant experiences with ASIC/SOC design convergence.
• Demonstrate experience in scripting with Unix shell, Perl and TCL.
• Good understanding of digital design, circuits, layout with a thorough understanding of CMOS processes.

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research

Amazing Benefits!

Here at Intel, we invest in our people. Beyond health, dental, and retirement benefits, Intel's benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment. Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program. Find more information about our Amazing Benefits here: https://jobs.intel.com/benefits

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Arizona, Phoenix

Additional Locations:

Business group:

Intel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first "Open System Foundry" model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient and sustainable source of supply.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.