Power Integrity Engineering Intern

Job Details:

Job Description:

Responsibilities may be quite diverse of a nonexempt technical nature. U.S. experience and education requirements will vary significantly depending on the unique needs of the job. Job assignments are usually for the summer or for short periods during breaks from school.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through relevant training and/or research experience.

This U.S. position is open to U.S. Workers Only. A U.S. Worker is someone who is either a U.S. Citizen, U.S. National, U.S. Lawful Permanent Resident, or a person granted Refugee or Asylum status by the U.S. Government. Intel will not sponsor a foreign national for this position.

This will be a Year-round On-Site assignment:

20 Hours per week/school days

40 Hours per week/non-school days

Minimum requirements:

Pursuing Bachelor's of Science in Electrical Engineering at a local university in Phoenix Metro, Arizona, US

The Candidate must be either in their junior or senior year and planning to graduate in or after May' 2025.

Completed the following course work at undergraduate level:

• Basic Circuits theory
• Power electronics that would include voltage regulator topologies.
• Analog and/or Mixed circuit design

Completed the following preferred course work (not required) at undergraduate level:

• Power integrity design
• Power semiconductor physics
• Linear and non-linear control

Preferred skills (not required) but could make you stand out:

• Experience in signal and power integrity industry simulation tools like Spice, Matlab, 3-D solvers, etc.
• Leadership skills
• Ability to design the power solution with constraints that include cost, schedule and design space
• Background knowledge on transmission line theory, IO circuits, high-speed signaling, and electronics microprocessor packaging
• Experience with electronic equipment characterizations/measurements that include digital oscilloscopes, network analyzers and electronic loads.

Job Type:

Student / Intern

Shift:

Shift 1 (United States of America)

Primary Location:

US, Arizona, Phoenix

Additional Locations:

Business group:

The Data Platforms Engineering and Architecture (DPEA) Group invents, designs & builds the world's most critical computing platforms which fuel Intel's most important business and solve the world's most fundamental problems. DPEA enables that data center which is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies-spanning software, processors, storage, I/O, and networking solutions-that fuel cloud, communications, enterprise, and government data centers around the world.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence.