Pre-Silicon Cluster RTL Verification

Job Details:

Job Description:

Job Description

Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings.

In this role responsibilities include, although not limited to:

• Oversees definition, design, verification, and documentation for SoC (System on a Chip) development.
• Determines architecture design, logic design, and system simulation.
• Defines module interfaces/formats for simulation.
• Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs.
• Contributes to the development of multidimensional designs involving the layout of complex integrated circuits.
• Performs all aspects of the SoC design flow from high level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing.
• Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results.
• May also review vendor capability to support development.
• Mentor junior engineers and develop verification methodologies.

In addition to the qualifications listed below, the ideal candidate will demonstrate the following traits:

• Analytical and problem solving skills.
• Communication.
• Teamwork skills.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

You must possess a Bachelor's Degree in Electrical Engineering, Computer Engineering, or Computer Science and 4+ years of experience; OR a Masters Degree in in Electrical Engineering, Computer Engineering, or Computer Science and 3+ years of experience; OR a PhD in Electrical Engineering, Computer Engineering, or Computer Science and 1+ years of experience with in the following:

• Validation of ASIC's or IP blocks or SOC's.
• UVM/OVM testbench experience.
• Computer architecture such as pipelined systems, cache subsystems and coherency.
• System architecture such as I/O connectivity and interrupt handling.
• Writing System Verilog.
• Programming experience in C++, Perl/Python.
• A range of internal and 3rd-party logic and design verification tools.
• SoC integration and/or verification.
• Experience developing testbench components such as: BFMs, monitors, checkers, etc.

Job Type:

Shift:

Shift 1 (United States of America)

Primary Location:

US, Arizona, Phoenix

Additional Locations:

US, Oregon, Hillsboro

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Business group:

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel's products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore's Law and groundbreaking innovations. DEG is Intel's engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A