Pre-Silicon Verification Engineer

Job Details:

Job Description:

The IP Test chip and Validation Engineering team is hiring Pre-Si Verification Engineers.

You will be responsible for, but not limited to:

- Working with a high performing team to deliver fully functional test chips on Intel's latest process technology to reduce product risk for various Foundational IPs including Memory Compilers, Standard Cells, PLLs, Digital Thermal Sensor, GPIOs, etc.

- Interface with architects and senior design team members to develop test plans covering test environments, checker and coverage strategies and test generators.

- Utilize various debug and validation tools to implement validation plans and develop test benches, test sequences, functional coverage to perform verification of designs under test.

- Interface with Post-Si team for seamless porting of test content from Pre-Si environment.

In addition to the qualifications listed above the ideal candidate will also have:

- Analytical and problem-solving skills.

- Solid verbal/written communication skills.

- Effective team player with continuous learning mindset.

- Be willing to balance multiple tasks.

-Be willing to work in a fast-paced environment and have as much fun and growth as possible in the process.

This is an entry level position and compensation will be given accordingly.

#DesignEnablement

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.

Knowledge and/or experience listed below would be obtained through a combination of your schoolwork and/or classes and/or research and/or relevant previous job and/or internship experiences.

Minimum Qualifications:

- Candidate must have a BS degree with 3+ months of experience or MS degree with 6+ months of experience in Electrical or Computing Engineering or related field.

- Experience in PERL/Python, Shell Scripting and Microsoft Office products for documentation.

- Programming experience with Hardware description languages like C, Verilog, VHDL or System Verilog.

Preferred Qualifications:

6+ months of experience in the following:

- Experience developing System Verilog test bench using OVM/UVM constrained random verification methodology.

- Working knowledge of some of the protocols such as AMBA, PCI, PCIe, Ethernet, USB and JTAG.

- Experience in Assertion, Functional Coverage and Solid debugging skills.

- Knowledge about version control system and bug tracking tools.

- Experience in the full product cycle of validation from planning to post-silicon support.

- Industry standard simulation EDA tools from Cadence, Mentor Graphics, or Synopsys.

- Experience can be gained through Classwork/Projects, Internships and/or Work Study Programs.

Job Type:

College Grad

Shift:

Shift 1 (United States of America)

Primary Location:

US, Arizona, Phoenix

Additional Locations:

US, Oregon, Hillsboro

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Business group:

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.