Principal Mixed Signal Verification Engineer

Allegro MicroSystems · Other US Location

Company

Allegro MicroSystems

Location

Other US Location

Type

Full Time

Job Description

At Allegro we flex. Flex@Allegro is our approach to hybrid working that empowers managers and their team members to decide where and when work will be done. Ask what Flex@Allegro can mean for you.

Seeking a Principal Analog/Mixed-Signal Verification Engineer to define, verify and debug Analog and Mixed Signal Integrated circuits intended for Automotive and Industrial systems. In this role you will determine best modeling and simulation practices, including the use of behavioral models and object-oriented test benches used to develop advanced power management and lighting integrated circuits. Candidate should have strong technical and communication skills.

You will:

  • Lead top level and block level verification of power IC's
  • Responsible for all aspects of design verification from initial plan to completed verification report.
  • Assist Systems/Design Engineers in top-down chip architecture development and feasibility.
  • Generate object-oriented System Verilog Testbenches for Analog IP verification

    • Includes creation of Scoreboard, Sequencer, Driver, Monitor
    • Creation class objects to allow for easier verification by other team members
    • Translation of requirements to verification tests.
    • Assertion development to enforce analog and digital requirements.
    • Regression testing
  • Train engineers to read analog schematics and extract functionality for generation of models.
  • Verify integrated circuit blocks such as DC/DC converters, LDOs, amplifiers, comparators, oscillators, and A/D and D/A converter models with their corresponding analog netlists.
  • Generation of top-level netlist for verification within the cadence mixed signal environment.
  • Use various software environments for the behavioral modeling and verification of complex mixed-signal integrated circuit systems.

Qualifications:

  • BSEE, MSEE (preferred) with 12+ years of experience in analog/mixed signal IC design verification
  • Ability to clearly communicate ideas and concepts.
  • Proficient using Cadence design tools.
  • Use of scripting languages to facilitate the regression testing of designs.
  • In depth understand of System Verilog including RNM coding, creation of objects, virtual interfaces
  • Sufficient understanding of analog/mixed signal design practices to allow for creation of logic, DC, and timing accurate models.
  • Able to solve challenging problems during verification and debug
  • Experience modeling mixed signal blocks including bias networks, regulators, oscillators, bandgaps, filters, OTA's, and data converters.

#LI-DL1

At Allegro, we are committed to providing a harassment-free environment of mutual respect to fuel innovation through inclusive thought collaboration. Allegro is an Equal Opportunity Employer and does not discriminate on the basis of race, religion, color, sex, gender identity, sexual orientation, age, physical or mental disability, national origin, veteran status, parental status, or any other basis covered by appropriate law. Allegro makes hiring decisions based solely on qualifications, merit, and business needs at the time.

Date Posted

05/06/2023

Views

7

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