Principal / Senior Principal Digital Design Engineer

What You Will Do

• Digital function verification for power management and signal processing IC products.

• Verification plan development according to product definitions and architecture

• Verification environment development with SystemVerilog and UVM

• Test case collection, regression management, verification progress updates

• Verification flow improvement on both module level and top level

• Verification IP introduction and development

• Analog behavior modeling support for system function verification

• Writing technical documentations

What You Will Need

• BS degree with 8+ year or MS degree with 5+ year experience in digital verification
• Excellent SystemVerilog coding skills
• Hand-on experience of building verification environment using SystemVerilog and UVM
• Hand-on experience of verification management is a strong plus
• Strong problem-solving skills
• Experienced with either Cadence or Synopsys EDA tools.
• Excellent communication and teamwork skills

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Nexperia is an Equal Opportunity/Affirmative Action Employer.