Senior ASIC Verification Engineer (Contractor)

Tarana Wireless is seeking to hire verification engineers to verify the world’s most powerful SoCs for broadband wireless access that will connect the world wirelessly with fiber-class speed, on both Line of Sight and Non Line of Sight connections.

What you’ll be doing:

• Work with some of the best DSP, system, and software engineers to define verification strategies and execute plans at system or full chip level
• Build and continuously improve verification infrastructure and methodologies to meet the demands of next generation SoCs
• Work with system architects, RTL designers, FPGA and emulation engineers to ensure that verification requirements and coverage are met for each project

Ways to stand out from the crowd:

• Ability to handle complex and hard-do-solve problems in programming and verification
• Ambitious and dedicated
• Good interpersonal skills
• Solid knowledge and strong experience of System Verilog, UVM, and C/C++
• Experience with building abstraction layered and reusable verification testbench infrastructure
• Working knowledge of scripting languages such as Python

Required Skills & Experience:

• BSEE required/MSEE preferred
• 5-12 years of experience 
• Exceptional analytical skills and problem-solving skills
• Proficiency with at least one of these: C++, Object Oriented Programming, UVM, System Verilog
• Strong knowledge on basic concepts of VLSI, SoC architecture