Senior Design Engineer

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

Tenstorrent USA, Inc:  Tenstorrent USA, Inc seeks Senior Design
Engineer. Job site is located at 2600 Great America Way Ste 501, Santa
Clara, CA 95054. The position requires Bachelor’s degree in in Electrical
Engineering (EE), Electrical and Computer Engineering (ECE), Computer
Engineering (CE), or Computer Science (CS), and 36 months of experience
in job offered or in related occupation. Alternative Requirements: Master’s
degree in Electrical Engineering (EE), Electrical and Computer Engineering
(ECE), Computer Engineering (CE), or Computer Science (CS) and 24
months of experience in job offered or in related occupation. Skills:
Knowledge of Modern computer architecture including processor pipeline,
memory hierarchy; Verifying Logic design and representing the same in
HDL (e.g. Verilog or VHDL); Architectural/microarchitectural performance
trade-offs, using Unix/Linux environment, Perl or Python or Ruby, VCS or
NC-Verilog, System Verilog or UVM; debug tools or waveform viewers;
Formal verification tools and techniques.

Job Duties: RTL design and development of IP (e.g. CPU, Network-
on-chip, etc.) and SOCs used in Core and ASICs. Define architectural,
microarchitectural and logic requirements and write code in a hardware
description language (e.g. Verilog, VHDL, Chisel, etc.) to implement chip
functionality. Explore open source as well as vendor tools and
methodologies. Use industry standard EDA tools for design
implementation such as but not limited to VCS, NC-Verilog, Verilator.
Develop tools and environments as needed to implement the design in
RTL. Analyze workloads from applications to industry standard
benchmarks and proprietary microbenchmarks. Use this analysis to
evaluate hardware changes for IP and SOC microarchitecture. Drive trade-
offs for logic by working closely with performance, verification and
physical design engineers to craft optimal solutions that meet the design
goals. Deploy innovative techniques for improving power, performance
and area of the design. Run experiments to evaluate synthesis, timing and
power results. Debug RTL/logic issues across various hierarchies (core,
chip) in both pre-silicon and post-silicon environment. Apply knowledge of
computer architecture, instruction set, digital and circuit design to develop
and simulate the design. Use disparate programming languages such as
C/C++, Python, Perl, Verilog, System Verilog, Assembly to perform various
tasks related to RTL design. Work collaboratively with other members of
the team across various domains. This is a hybrid position requiring
candidate to report in office 2600 Great America Way Ste 501, Santa
Clara, CA 95054 with the option to work from home on certain days.
Qualified candidates should live within commuting distance.

IF INTERESTED, PLEASE MAIL RESUMES:

TENSTORRENT USA, INC
ATTN: HR DEPARTMENT
2600 Great America Way Ste 501, Santa Clara, CA 95054