Senior DFT Engineer

Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology.

What You'll Do:

• To work in a fast environment with multiple HSIO IP (CXL/PCIe, DDR, HBM, UCIe) and SoC designs
• Design and implement state-of-the-art DFT architecture to meet growing industry demands for efficient test and debug capabilities.
• Generate and Insert DFT structures at the RTL and gate levels, verifying the correct operation of those structures from RTL to back-annotated gates.
• Generate scan-inserted netlists, produce ATPG patterns to achieve coverage targets, and simulate them for correctness.
• Run timing analysis, review constraints and waivers, analyze violations, and work with other teams to fix the design.
• Produce ATE test patterns for MBIST, Scan, Functional & analog testing and support silico ATE testing and debug.
• Participate in diagnostics and failure analysis for customer returns.
• Mentor and lead a team of junior engineers to accomplish all the above tasks within the defined project constraints.
• You will report to the head of the Central DFT Team.

What You'll Need:.

• Experience with UNIX, Perl, TCL, and other scripting languages.
• Experience in RTL and VHDL coding
• VCS/NCSim or Verilog simulator experience. Familiarity with Spyglass tool & checks
• Familiarity with DesignCompiler/DFT Compiler/TestKompress/Tessent tools/TetraMax
• Experience with Tessent MBIST or SNPS SMS compilers
• Experience with static timing analysis and PrimeTime tool
• Experience with modern DFT techniques, JTAG standards (1149/1500/1687), scan and clock control designs, and best practices for ATPG
• Understanding of general high-speed, small-tech node design techniques

Good To Have:

• Bachelor's degree in engineering science, Electrical and Computer Engineering or Computer Science
• 4+ years of experience in the semiconductor industry in engineering or leadership roles in RTL, Verification, DFT or FE/PD capacity. Applicants with less experience may be considered for other DFT positions within the team.
• Experience with DFT EDA tools from Tessent, SNPS, and Cadence.
   

"Hybrid work environment"

As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes:

• Competitive Compensation Package
• Restricted Stock Units (RSUs)
• Medical Insurance

Diversity & Inclusivity

Alphawave Semi is based out of one of the most diverse countries in the world. This includes differences related to race, ethnicity, national origin, gender, gender expression and presentation, sexual orientation, religion, age, ability and socioeconomic status. To us, diversity is one our strongest assets to our organization. We commit ourselves to promoting the recognition and appreciation of our diverse and rich culture. We believe that it is critical to our success to promote freedom of thought and opinion in a respectful environment. The decisions we make are rooted by respectfully considering each other’s thoughts and opinions and by working towards a greater common goal.

Accommodation

Alphawave Semi is an equal opportunity employer and welcomes applications from all qualified individuals, including visible minorities, Indigenous People, and persons with disabilities. We welcome and encourage applications from people with disabilities. If as a qualified job applicant, you request accommodation, Alphawave Semi will consult with you to provide reasonable accommodations according to your specific needs. If you wish to make a request, you will be provided an opportunity if you’re applications is selected to proceed in our hiring process.