Senior Embedded Design Engineer (FPGA/ASIC)

Two Six Technologies is looking for an Senior Embedded Design Engineer (FPGA/ASIC) to join our team. If you have a desire to perform cutting-edge research and development on embedded devices for novel security applications, let’s talk!

Minimum Requirements:

• A minimum of 5 years of experience with RTL design and verification using VHDL, Verilog/System Verilog. Open to adopt SystemVerilog.
• A minimum of 5 years of experience with RTL Synthesis using a synthesis tool such as Xilinx ISE or Vivado, Intel Quartus or Microsemi Libero.
• At least 5 years of experience with RTL Verification using simulation tools such as Xilinx XSim, QuestaSim/ModelSim, Synopsys VCS, or Cadence NCsim.
• Active Secret or Top Secret security clearance
• Must be willing to obtain and maintain a Polygraph clearance
• Ability to work on site in Arlington, VA.

Nice to have:

• Expertise in FPGA or ASIC development using SystemVerilog.
• Familiarity with SoCs and design flow including place, route and timing analysis. Experience with bring-up, debug, and validation of designs in hardware.
• Experience with integration, test and debug tools (Oscilloscopes, spectrum analyzers, logic analyzers).
• Experience with interface protocols such as UART, USB, SPI/I2C, Ethernet, PCI-Express.
• Experience with version control tool such as Git.
• Familiarity with Linux OS.
• Experience with C, C++.
• Experience with Makefile and scripting languages such as Python, Bash, and TCL.

Security Clearance:

• Candidate must be able to obtain and maintain a security clearance and Polygraph

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