Senior Engineer, Verification

• Verify internally developed RTL IP using 3rd party NVMe Verification IP
• Develop NVMe Verification test suite to test internally developed RTL IP
• Expertise in developing block level / system level verification environment
• Expertise to develop BFMs / Checkers / monitors / Scoreboards
• Experience in developing block/system level verification plans and tests
• Must have capability to debug test failures to find the root cause
• Working experience in Simulation tools like Synopsys UVM or Mentor Modelsim/Questasim, Synthesis tools, Coverage tools, and Regression tools
• Working experience in IP/SoC verification using AMBA AXI, DMA, FIFO, etc. modules
• Knowledge of scripting languages like Perl, Tcl
• Contribute to RTL design and FPGA based emulation activities
• Work with other hardware/ software architects developing one of a kind innovative FPGA prototype, contribute to feasibility studies & developing solutions
• Familiarity with Lab bringup of RTL in FPGA environment
• Assist architects developing Linux/ Windows device driver, test and debug

What You Bring 

• Bachelor's with 5+ years of relevant industry experience, or Master's with 3+ years or PhD in data science engineering or related technical field preferred
• Prior Verification experience required
• In depth expertise in PCIe interface technologies desired
• In depth background in Verification development, debug, simulation, test bench
• Must be highly motivated with excellent verbal and written communication skills.
• Demonstrated attention to detail
• Ability to meet aggressive project deadlines in a team environment.
• Ability to work successfully with cross-functional teams, including coordinating across organizational boundaries and geographies.
• Ability to create near term value within a strategic research environment
• Exposure to CXL, NVMe block storage protocol highly desired
• Exposure to VIP based verification.
• Exposure to ARM instruction set architecture and development for ARM processors highly desired
• Exposure to Avery, RTL and FPGA development highly desired
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

·       #LI-RR1