Senior Software Engineer, Tensor Processing Units Compiler

Minimum qualifications:

• Bachelor's degree or equivalent practical experience.
• 5 years of experience testing, maintaining, or launching software products, and 1 year of experience with software design and architecture.
• 2 years of experience working with CUDA C++ application development and 1 year of experience with Native Code, Just-In-Time (JIT), Cross, Source-to-Source or any other type of compilers.
• 2 years of experience with data structures or algorithms, with experience with machine learning algorithms and tools (e.g., TensorFlow), artificial intelligence, deep learning, or natural language processing.

Preferred qualifications:

• Master's degree or PhD in Computer Science or related technical fields.
• Experience with performance, large-scale systems data analysis, visualization tools, or debugging.
• Experience with debugging correctness and performance issues at all levels of the stack.
• Experience with optimizations in mid-level and low-level architecture.
• Experience with hardware/software co-design.
• Experience in GPU integrating low-level CUDA work into higher-level frameworks (e.g., TF, JAX, PyTorch).

About the job

Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Google's needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.

Our team builds the compiler which enables Tensor Processing Units (TPUs), Google's in-house custom designed processor, to accelerate machine learning and other scientific computing workloads for both internal Google customers and external Cloud customers. The team offers opportunities up and down the compiler stack, working on Low Level Virtual Machine (LLVM) as well as the Multi-Level Intermediate Representation (MLIR) middle-end.

In this role, you will be working on the MLIR/LLVM based TPU compiler for TPUs. You will support new workloads, optimize for new models and new characteristics, as well as support new TPU hardware across multiple generations.

Google Cloud accelerates every organization's ability to digitally transform its business and industry. We deliver enterprise-grade solutions that leverage Google's cutting-edge technology, and tools that help developers build more sustainably. Customers in more than 200 countries and territories turn to Google Cloud as their trusted partner to enable growth and solve their most critical business problems.

The US base salary range for this full-time position is $161,000-$239,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google .

Responsibilities

• Contribute to a compiler for a novel processor designed to accelerate machine learning workloads. Compile high-performance implementations of operations at a distributed scale.
• Work closely with users of TPUs to improve performance/efficiency and hardware designers to co-design future processors.
• Investigate high-level representations to effectively program large-scale, distributed, and heterogeneous systems.