Senior Staff Engineer, high speed analog

What You’ll Do

The Advanced Interconnect Lab (AIL) is seeking a self-driven and motivated professional qualified individual to join their team located in San Jose, CA. The qualified individual will be responsible for research and development of a wide variety of Cutting-edge circuits and architectures for optical interconnects, including analog front end, SERDES and error corrections.

Location: Hybrid, working onsite at our San Jose, CA office 3 days a week, with the flexibility to work remotely the remainder of your time.

Job ID:42382

Responsibilities include:

• High speed analog/mixed-signal circuit design, simulation and layout
• Pre-layout and post-layout simulation and verification
• Parasitic extraction and post-layout simulation
• Top level spice and mixed-mode simulations to validate top level integration.
• Writing descriptions, detailed information and test plan of the designed blocks
• Testing and troubleshooting of silicon dies
• Analyzing and interpreting test results

What You Bring

• Bachelors in Electrical, Computer Science or related with 15+ years of experience or Masters in Electrical, Computer Science or related Science with 13+ years of Industry Experience or PhD in Electrical, Computer Science or related Science with 8+ years of Industry Experience Preferred.
• At least 7+ years of experience in designing Si-based high-speed circuit, including but not limited to PLL/DLL, CDR, RO/LC oscillators, regulators, TIA, limiting amplifiers, VGAs, CTLE,FFE,DFE and digitally-assisted analog techniques
• Deep understanding of clocking fundamentals, such as phase noise, jitter analysis, budgeting and feedback loop dynamics
• Production experience with one or more of the above-mentioned blocks
• Proficiency in analog/mixed-signal circuit design, simulation and analysis, Experience with LC and RO VCO design. Good knowledge of band gaps, bias, op-amps, LDOs, feedback and compensation techniques as well as digitally assisted analog circuit techniques
• Lab and ATE test plans, measurement for characterization, and volume production
• Experience with LC and RO VCO design. Good knowledge of band gaps, bias, op-amps, LDOs, feedback and compensation techniques as well as digitally assisted analog circuit techniques
• Lab and ATE test plans, measurement for characterization, and volume production
• including bandgaps, bias, opamps, LDOs, feedback and compensation techniques
• Proficient in using Cadence, Synopsys and Siemens design tools, such as Virtuoso, Hspice, StarRC, Calibre etc.
• Hands-on experience in testing and characterization
• Attention to details, exceptional focus on understanding the problems at hand and ensure thoroughness in problem-solving
• Good written and verbal communication skills, with outstanding teamwork capabilities
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

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