SoC Design Engineer

Job Details:

Job Description:

The Xe Silicon Engineering (XSE) organization was formed to enable scale for our expanding AXG product roadmap. By bringing all SoC functions and expertise under one umbrella, it will enable us to unleash full collaboration potential between SoC architecture and design implementation for scalable architectures, and leadership in power, performance, and area, and achieve IDM 2.0's vision for all Integrated Graphics GCD, Visual Compute, Super Compute, and Custom Compute products.

In the position of an SoC Design Engineer you will be a member of the Pre-Silicon Design/Validation team who are responsible for coding and validating individual units, clusters, subsystems, and SoCs. You will be responsible for high-quality design/validation aligned with the project schedule.

Your responsibilities will include, but are not limited to:•

• Writing specifications to describe design changes, and the intended implementation
• Coding design changes in RTL, following team coding guidelines
• Analyzing timing reports to look for alternate design approaches to meet frequency requirements
• Development of test plans, testbench, BFMs (bus functional models), checkers, trackers for assigned areas of the chip
• Test plan execution involving test writing, debugging, and driving bug closure
• Development of functional/code coverage and achieving coverage goals
• Working closely with validation engineers, design engineers, micro-architects, and other team members to ensure high quality of test plans, functional coverage, and tests quality validation that minimizes bug escapes
• Contributing to process improvements, where applicable, and gaining domain expertise to be able to effectively independently validate work
• Interfacing with emulation, and software teams to ensure synergy with RTL validation

Behavioral Attributes Sought:

• Strong self-discipline to deliver high-quality work against tight deadlines, yet maintaining attention to detail
• The ability to work effectively in a cross-site, culturally diverse team environment
• Excellent problem solving abilities
• Strong written and verbal communication skills

Qualifications:

For information on Intel's immigration sponsorship guidelines, please see Intel U.S. Immigration Sponsorship Information

Minimum Education and Qualifications:

A Bachelor's in Electrical/ Computer Engineering or any directly related fields with 1+ years of industry experience in one, or more of the following areas:

• Logic verification and design
• Verilog/System Verilog
• PERL or another scripting language (Python, Ruby)

Preferred Qualifications:

• Master's degree in Electrical/ Computer Engineering or a directly related field

Job Type:
College Grad

Shift:
Shift 1 (United States of America)

Primary Location:
US, Arizona, Phoenix

Additional Locations:
US, California, Folsom, US, California, Santa Clara, US, Texas, Austin

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Business group:
The focus of Accelerated Computing Systems and Graphics (AXG) is to accelerate our execution in strategic growth areas of high-performance computing and graphics. AXG is chartered with delivering high performance computing and graphics solutions (IP, Software, Systems), for both integrated and discrete segments across client, enterprise and data center. Our mission is to make zeta-scale computing accessible to every human on the planet by the end of this decade and to entertain, educate and connect billions of people with buttery smooth visual experiences.

Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A

Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.