Sr. Device Designer

Job Title

Sr. Device Designer

Degree:

PhD

Work Experience:

0-1 year

Travel:

10%

Workplace Types:

Hybrid

Job Description:

• Identify the design specifications and technical solutions of the customized device based on product roadmap and EDS of the next level sub-system and conduction research and development works in the following areas:

• Customized semiconductor device (especially customized electron detection device) design and simulation, performance optimization, and simulation model building.
• Customized semiconductor device testing / characterization.
• Testing / Characterization method and plan making, and test environment design and building.
• Analog and mixed signal circuit (detector signal conditioning circuit) design at both chip and PCB level.
• Customized semiconductor device process optimization.
• Customized semiconductor device package design.

• Work with internal teams and external partners / suppliers on the detailed implementation of technical demonstrators of the customized devices.
• Work with internal teams and external partners / suppliers on performance test / characterization of the technical demonstrators. Collect issues, conduct issue analysis, and propose solutions.
• Generate design related technical documents e.g., EPS, TPS, TAR, etc. Review technical documents from external suppliers / partners.
• Support the system level integration and on system test.
• Generate and / or review related IP documents.

The current base annual salary range for this role is currently $0-$0. Pay scales are determined by role, level, location and alignment with market data. Individual pay is determined through interviews and an assessment of several factors that that are unique to each candidate, including but not limited to job-related skills, relevant education and experience, certifications, abilities of the candidate and pay relative to other team members. Our recruiters can share more information about our bonus program, benefits and equity during the hiring process.