Staff Design Verification Engineer - CPU Subsystem

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

This role is on-site, based out of Bangalore, India.

• Define verification plans and develop DV environments independently in System Verilog (SV)/UVM.
• Knowledge of C++ is desirable.
• Create and execute test plans to ensure the quality and reliability of our IP solutions.
• Demonstrate expertise in System Verilog and UVM methodologies.
• Perform functional verification at the RTL level, including coverage analysis and improvement.
• Develop Universal Verification Components (UVCs) from scratch.
• Experience with Cache, NOC Interconnect verification is desirable.
• Knowledge of bus protocols like AXI, CHI etc. are added advantage.