Technical Program Manager, ASIC

Summary

Meta is seeking a Technical Program Manager with ASIC/FPGA design and development experience. This Technical Program Manager (TPM) will lead cross-functional and multi-site teams on delivering ASICs and FPGAs to enable Facebook's Infrastructure Engineering organization, whose responsibilities include the growth, management and 24x7 upkeep of Meta's family of apps. This is a full-time position based in our main office in our main office and will report to the Group Technical Program Manager.

Required Skills

Technical Program Manager, ASIC Responsibilities:

• Manage cross-functional infrastructure projects in a matrix organization covering a range of areas (Silicon Engineering, Network, Hardware Systems, Infrastructure Software Engineering, Capacity Management).
• Drive and manage ASIC/FPGA development and their subsystems with vendors, internal software and hardware teams, from concept to production
• Deliver ASIC/FPGA solution and high quality system products
• Engage in product management in collaboration with Engineering owners to define product roadmaps.
• Provide hands-on program management during all phases of silicon and firmware development from concept, design, development, fabrication, validation, qualification and production release phases.
• Drive internal process improvements across multiple teams and functions.
• Work with the software, hardware, architecture teams to understand the requirements and constraints
• Work independently with minimal supervision.

Minimum Qualification

Minimum Qualifications:

• Proven organizational and coordination skills along with multi-tasking capabilities to get things done in a fast paced environment.
• BS degree in Computer Science, Computer / Electrical Engineering or other technical field.
• Demonstrated experience to manage from technical details to big picture.
• 8+ years of experience in ASIC development. 4+ Program or Product management with proven technical leadership in similar fields.
• Experience in managing ASIC design flow (architecture, micro-architecture, RTL, Synthesis, functional verification, physical layout etc).
• Peoven cross-functional leadership and communication skills.
• Experience in pre-silicon testing with Emulation, FPGA and post-silicon validation.
• Proven interpersonal skills, including relationship building and collaboration within a diverse, cross-functional team.
• Familiar with semiconductor technology and manufacturing processes.

Preferred Qualification

Preferred Qualifications:

• Familiar with Machine Learning training or inference silicon and systems
• Experience in RTL design with VHDL, Verilog and/or SystemVerilog.
• Experience working with ODMs and vendors
• Experience with data center architecture and deployment
• Work experience in semiconductor start-ups
• Software knowledge with compilers.

EOE

Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other applicable legally protected characteristics. You may view our Equal Employment Opportunity notice here. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. We may use your information to maintain the safety and security of Meta, its employees, and others as required or permitted by law. You may view Meta's Pay Transparency Policy, Equal Employment Opportunity is the Law notice, and Notice to Applicants for Employment and Employees by clicking on their corresponding links. Additionally, Meta participates in the E-Verify program in certain locations, as required by law