VLSI Power Management, Physical Design

Join the team to develop state-of-the-art power management and custom-circuit features for industry leading AI processor families. You will be part of a full-stack vertical design team with areas ranging from u-architecture definition, rtl design, design verification to physical implementation. In addition, you will have the opportunity to work on post-Si validation using the most advanced ML graphs to characterize, verify and measure performance of AI processors in data centers.

Skills and Qualifications

• MS/PhD in Electrical/Computer Engineering with 5+ years of industry or research experience
• Strong fundamental knowledge in VLSI logic and circuit designs
• Programing and scripting knowledge using Python, Perl, C/C++
• Must be a self-motivated, team player with excellent communication and collaboration skills to work with system and software teams

Specific requirements

• Experience with floorplaning, placement, routing and creating timing constraints using standard synthesis and Place & Route tools
• Drive timing and PDV closure, electrical verification including signal integrity, EMIR for block sign-off
• Familiarity with System Verilog, LEC and CDC