Logic Design Lead - Chip Infrastructure and Security

Introduction
As a Hardware Developer at IBM you’ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable IBM customers to make better decisions quicker on the most trusted hardware platform in today’s market.

Your Role and Responsibilities
As a Logic design lead you will be responsible for leading the design and development of the POR Boot Engine Boot security features and the test & debug infrastructure for very high performance Processor chips/ ASICs. You will be part of the design team which will deliver this critical infrastructure to IBM’s Mainframe POWER processors and other ASICs.
Lead the Development of features present the proposed architecture in High level design discussions
#ISAISDLESD24
#ISDL_ESD2Q24 #ISAISDLESD24

Required Technical and Professional Expertise
8 to 12 years of work experience in

• Architecture/ microarchitecture/ RTL Logic design of Test and Debug infrastructure for Processors/ SoCs
• Security architecture- Self Boot engine Secure boot
• SPI I2C serial communication protocols OTPROM on-chip sensors
• Good understanding of clocks and reset architecture low power design
• Proficient in HDLs- VHDL must/ Verilog
• Experience in working with architecture/ FW/ SW teams
• Experience in working with verification validation physical design teams for design closure including test plan reviews and verification coverage
• Good understanding of Physical Design and able to collaborate with physical design team for floor-planning placement of blocks for achieving high-performance design
• Experience in leading uarch RTL design for feature enhancements. Being a lead ability – to quickly understand issues spanning multiple functional domains switch context frequently and provide solutions to problems is necessary.

Preferred Technical and Professional Expertise

• Processor development experience
• Processor domain knowledge