The IBM Power Systems Developemnt team is looking for a strong experienced engineer to join our PCIe/IO adapter team. This team is responsible for the intergration of industry standard off the shelf Ethernet and Fibre-Channel adapters with IBM Power Systems. In addition they are responsible for the PCIe verification of the PCIe bus on new Power System releases.
The PCIe IO Engineer is responsible for debug of interactions at the system PCIe level as well as IO adapter card level with an emphasis on Ethernet and Fibre-Channel adapters and up to the OS driver stacks. This includes development process execution integration testing fault isolation and resolution resolution of design issues. Day to day the PCIe IO Engineer will debug at the system and adapter level process execution integration testing fault isolation and resolution and perform resolution of design issues.
· Strong expertise in PCIe protocols and architecture (Gen4/Gen5/Gen6)
· Experience with CXL Fibre-Channel or ethernet protocols
· Strong working knowledge of Operating System and device drivers
· Strong knowledge of Linux FIO and a scripting language (Python is preferred)
· Ability to debug adapter and system firmware and hardware issues
· Experience with high-speed serial interfaces including SerDes PLL and equalization techniques
· Experience with PCIe analyzers and other PCIe/Ethernet/Fibre-Channel test equipment
Strong working knowledge of Operating System and device driver programming interface
Strong knowledge of Linux FIO and a scripting language (Python is preferred)
Ability to debug drive firmware and hardware issues
Strong knowledge of PCIe Ethernet and Fibre-Channel protocols is a huge plus
Ability to use and understand PCIe analyzer (LeCroy SerialTek or Xgig) is a huge plus
Ability to operate Oscilloscope BERT Jammers high-speed switches and other test equipment is a huge plus
Working knowledge of Windows Linux or VMware Operating system experience and driver development conceptual understanding a plus
Experience with high-speed serial interfaces including SerDes PLL and equalization techniques is a huge plus