Silicon Formal Verification Engineer

We Are:

The Silicon Design group is a diverse team of world class silicon design, verification and validation experts. We have 100+ years of cumulative hands-on experience in architecture, logic design, verification, physical design, emulation and firmware. We use the latest silicon technologies and processes to help our clients create well-designed solutions to highly complex challenges. We are designing and developing next-generation, high performance SoCs, supporting our clients in their drive to deliver their product vision to their users. We are involved in all aspects of chip design from definition and architecture through to verification and signoff. Accenture Consultants are true “Silicon to SW” Partners, allowing a new breed of companies in the semiconductor ecosystem to innovate in an unparalleled time to market.

You Are:

An experienced Formal Verification Engineer able to provide formal verification services for multiple blocks and IP’s.

The Work:

• Developing formal verification test plan
• Drive automation of formal testbenches and ensure they are a part of regressions
• Develop assertions, cover properties and connectivity checks and debug any failures in RTL regressions
• Work with cross functional teams (DV/Arch/Design/FW)
• Engage with the team to drive continuous improvement to the verification environment to find more bugs and improve coverage
• Work as a team to grow together.
• Mentor and coach junior team members