Silicon - Mixed Signal Verification Engineer

We Are:

The Silicon Design group is a diverse team of world class silicon design, verification and validation experts. We have 100+ years of cumulative hands-on experience in architecture, logic design, verification, physical design, emulation and firmware. We use the latest silicon technologies and processes to help our clients create well-designed solutions to highly complex challenges. We are designing and developing next-generation, high performance SoCs, supporting our clients in their drive to deliver their product vision to their users. We are involved in all aspects of chip design from definition and architecture through to verification and signoff. Accenture Consultants are true “Silicon to SW” Partners, allowing a new breed of companies in the semiconductor ecosystem to innovate in an unparalleled time to market.

You Are:

An experienced SoC Mixed Signal Design Verifier is able to provide design verification services for multi domain digital and mixed signal blocks in a processor or custom SoC.

Work you will do:

• Debug Verilog AMS/DMS models
• Run DMS simulations in Cadence or Synopsys co-simulation environment
• Ability view schematics in Virtuoso
• Good Understanding of Real Number Modeling techniques and challenges
• Understanding of Wreal, and Eenet datatypes
• Ability to create mixed signal assertions and debugging connect module issues
• Testbench development - System Verilog UVM and C tests
• Integration/development of C tests/APIs and SW build flow
• Integration/development of UVM mailboxes and HW/SW communication components
• Test plan development
• Coverage collection and closure
• Engage with the team to drive continuous improvement to the verification environment to find more bugs and improve coverage
• Power Aware testbench development and simulations
• Seamless porting between simulation/emulation/prototyping platforms
• Regression setup and debug for RTL/Gate Level Netlist/UPF PA sim/Emulation/Proto
• Working with cross functional teams (DV/Arch/Design/FW) to identify coverage scope
• Work as a team to grow together.
• Mentor and coach junior team members