System Signal Integrity Engineer

Summary

Posted: Jan 8, 2025

Weekly Hours: 40

Role Number:200585421

The candidate will work within the Mac organization to support the system-level signal integrity (SI) design, analysis, and validation aspects of Mac and Accessory products development from the conceptual design phase to the production. You should have deep knowledge and familiarity with all aspects of signal and power integrity for high speed SerDes, Parallel bus, and single-ended signaling. Come join us!

Description

System signal integrity engineer involves all aspects of signal integrity design in developing Mac products. You will be involved in designing Mac products from signal integrity perspectives through the simulation and analysis of multi-layer PCBs, flex, cable, connector, package, and die, including transmitter and receiver equalizations, for various high speed differential and single-ended signals as well as low speed GPIO signals. Routine responsibilities also include custom connector and cable design and development support, factory build support, and electrical compliance test support from signal integrity perspectives. The candidate should be able to model physical channel topologies including differential, single ended, and parallel bus types. Interconnect modeling capability, using S-parameter, W-elements, etc is required. An understanding of channel types including cabling, PCB materials, flex materials, and connector design methods and limitations is required. Skills with associated tools for 2.5D (PowerSI, SIWave, Sentinel-PI, nSys), 3D Full wave (HFSS, nWave), quasi-static tools (Q3D, nApex)is required. Relevant working knowledge of IBIS-AMI, HSPICE, Spectre, AMS, and Simplis models for system-level transient analysis is also necessary. Working knowledge of ADS is desired. Measurement expertise with frequency and time domain tools (VNA, TDR) including calibration & de-embedding experiences is desired. Experience with Matlab/Python/PERL and other scripting languages is desired. Excellent documentation and communication skills, ability to work independently, and demonstrated ability to innovate are required.

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• A solid understanding of signal integrity fundamentals for both single-ended and differential signals is required
• Experience in modeling various interconnect such as passive components, connector, cable, multi-layer PCB and Flex, and package, using 3D EM tools is required
• The candidate must have system-level Serdes design and analysis skills. The Serdes knowledge required includes understanding of transmitter and receiver equalization methods
• Masters with at least 5+ years of industry work experience required
• Excellent documentation and communication skills, ability to work independently, and demonstrated ability to innovate are required.

• Experience and knowledge on the transmitter and receiver compliance tests and passive channel/component characterization for high speed Serdes is required
• Experience in quasi-static (Q3D), 2.5D (PowerSI, SIWave) and 3D (HFSS, nWave)
• Experience in custom connector and cable extraction and optimization
• Experience in end-to-end channel analysis for both differential and single-ended signals, and its statistical DOE analysis across channel variants
• Knowledge and experience in various industry Serdes standards such as USB2, USB3, USB4, DiplayPort, HDMI, MIPI, SD, Ethernet, PCIe, and Thunderbolt
• Knowledge and experience in parallel bus interface design such as DDR, GDDR, LPDDR, NAND interfaces, and common synchronous interfaces
• Experience in Multi-level signaling such as PAM3 and PAM4

• Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.