Jobs at Cadence
15,385 open positions
Principal Physical Design Engineer (PNR/Physical Verification/STA/EMIR)
Company: Cadence Design Systems
Location: Raleigh-Durham, NC
Posted Apr 29, 2024
Cadence is seeking a highly experienced physical design engineer with expertise in N7/N5 and below processes. The role involves physical design implementation, physical verification, static timing analysis, and EM/IR analysis. The ideal candidate should have a degree in EE/CS/IT, over 12 years of experience, strong scripting skills, and excellent communication and teamwork abilities. Cadence values diversity and inclusivity, and welcomes applications from candidates with disabilities and those from equity seeking groups.
Lead Product Engineer
Company: Cadence Design Systems
Location: South Bay
Posted Mar 21, 2024
Cadence is seeking an RF/microwave design engineer with experience in Microwave Office or similar EDA software, interested in software development and validation. The role involves working on new feature development, creating automated testing infrastructure, providing technical assistance, and assisting in software implementation. The ideal candidate should have an MS in Electrical/Computer Engineering, RF/MW circuit design experience, Python proficiency, and excellent communication skills. Proficiency in Linux, Cadence Virtuoso/Allegro, Git, and automated software testing are preferred. The annual salary range for California is $108,500 to $201,500, with additional incentives. Cadence emphasizes the importance of the work, encouraging candidates to join in solving complex problems.
Senior Lead DFT Design Engineer
Company: Cadence Design Systems
Location: Raleigh-Durham, NC
Posted May 04, 2024
<p><strong><b>At Cadence we hire and develop leaders and innovators who want to make an impact on the world of technology<b><strong> <p> <p>Looking for Lead SoCASIC Digital Design Engineer with experience in Design for Test DFT Ability to lead from DFT Architecture to Silicon Debug is required An intimate knowledge and experience in scan chain insertion compression scan technologies memory builtin selftest MBIST and automatic test pattern generation ATPG is required for this position Should follow systematic quality metrics driven ATPG pattern generation It is highly desirable for candidate to possess handson knowledge of synthesis verification and debugging Verilog testbenches <p> <p>Requirements <p> <ul><li>Prior 1520 years of professional experience in SoCASIC Digital Design with focus on Design for Test DFT<li> <li>Should be able to lead DFT in projects from architecture to silicon debug<li> <li>Should possess intimate knowledge of DFT insertion flows<li> <li>Basic scan chain insertion using synthesis or other software tools<li> <li>Experience in compression scan insertion LBIST and other scan technologies<li> <li>Intimate knowledge of memory buildin selftest MBIST<li> <li>Expertise in Automatic Test Pattern Generation ATPG to achieve design test coverage goals<li> <li>Debug and Analysis of failures to improve fault coverage<li> <li>Verification of ATPG testbenches and debugging root cause of simulation miscompares<li> <li>Working knowledge of JTAG 114916 IEEE1500 and IEEE1687<li> <li>Knowledge of timing analysis and equivalency checks would be added bonus<li> <li>Ability to work in collaborative team environment<li> <li>Prior experience with Cadence tools and flows is highly desirable<li> <li>Should be able to finish DFT tasks independently<li> <li>Strong problemsolving skills Exhibit discipline thoroughness and methodical approach in solving problems<li> <li>Ability to work with stakeholders across crossfunctional teams Architecture Design Internal and External Customers<li> <li>Selfdriven and committed individual who can work in a fastpaced project environment<li> <ul><p>LIMA1 <p> <p>The annual salary range for San Jose CA is $ 138600 to $257400 You may also be eligible to receive incentive compensation bonus equity and benefits Sales positions generally offer a competitive On Target Earnings OTE incentive compensation structure Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications skill level competencies and work location Our benefits programs include paid vacation and paid holidays 401k plan with employer match employee stock purchase plan a variety of medical dental and vision plan options and more <p> <p><strong><b>Were doing work that matters Help us solve what others cant<b><strong><p>
Mixed Signal IP - Senior Program Manager
Company: Cadence Design Systems
Location: South Bay
Posted Apr 29, 2024
Cadence is seeking a Senior Technical Project Manager with extensive experience in mixed-signal IP design and SoC development. The role involves coordinating R&D projects, managing customer engagements, and collaborating with various teams. The ideal candidate should possess critical thinking, teamwork, and adaptability skills. The annual salary range for California is $147,000 to $273,000, with additional incentives. The company emphasizes the importance of their work and encourages candidates to join them in solving complex problems.
Sales Operations Analyst
Company: Cadence Design Systems
Location: South Bay
Posted Mar 22, 2024
Cadence is a company that hires and develops leaders and innovators, offering growth opportunities in various career stages. They provide comprehensive solutions for electronic systems and semiconductor companies, enabling them to create transformative products. Cadence is recognized as a Great Place to Work, with a culture that fosters innovation and business success. The company is seeking a candidate for a sales operations role, requiring a quantitative background, CRM experience, SQL skills, and proficiency in Microsoft Office and data visualization tools. The position offers the opportunity to work with senior business leaders, impact the organization globally, and receive competitive compensation and benefits.
Senior Distinguished Engineer
Company: Cadence Design Systems
Location: South Bay
Posted Mar 21, 2024
Cadence is seeking a senior software engineer with a MS/PhD in CS, EE, mathematics or related degree, and detailed knowledge of C++. The ideal candidate should have experience developing and maintaining code bases of moderate size (100K lines) and a strong background in computational electromagnetics, circuit theory. The annual salary range for California is $213,500 to $396,500, with additional incentives. Cadence offers a variety of benefits and is doing work that matters.
Principal Product Engineer - CFD
Company: Cadence Design Systems
Location: South Bay
Posted Mar 18, 2024
Cadence is seeking a Product Engineer with a degree in Mechanical or Aerospace Engineering and expertise in Large Eddy Simulation, aero acoustics, combustion, and multiphase flows. The role involves creating software feature specifications, managing backlogs and release processes, and providing testing and support. The engineer will primarily focus on high-fidelity simulations for automotive, aerospace, and turbomachinery industries using Stitch and CharLES software. The annual salary range for San Jose, CA is $128,100 to $237,900, with additional incentives and benefits. Cadence emphasizes the impactful nature of their work.
Lead Emulation/Prototyping Application Engineer
Company: Cadence Design Systems
Location: South Bay
Posted Mar 21, 2024
Cadence is seeking a skilled professional with 4-10 years of industry experience for a customer-facing role in the North America Verification Field Applications Engineering Team. The role involves providing technical support, developing customer-specific requirements, and championing customer needs to secure design wins. Key responsibilities include establishing technical credibility, providing in-depth technical assistance, and writing technical product literature. The ideal candidate should have strong RTL and Testbench debug skills, experience in synthesizable coding style, and proficiency in SystemVerilog, VHDL, Verilog, C/C++/SystemC. Experience in HW acceleration, in-circuit emulation, or FPGA prototyping is preferred. The annual salary range for California is $98,000 to $182,000, with additional incentive compensation and benefits.
Sr Design Engineering Architect
Company: Cadence Design Systems
Location: South Bay
Posted Mar 21, 2024
Cadence is a company that hires and develops leaders and innovators to impact technology. Successful applicants will participate in designing and developing a fully configurable NoC product, requiring expertise in NoC technology, AMBA protocols, and coherency protocols. The annual salary range for California is $192,500 to $357,500, with additional incentives. Cadence emphasizes the importance of their work and encourages employees to solve complex problems.
Senior Principal Design Engineer
Company: Cadence Design Systems
Location: South Bay
Posted Apr 14, 2024
Cadence, a global leader in EDA, is seeking innovative leaders for a Network on Chip (NoC) product development role. The position involves hardware architecture, micro-architecture definition, and RTL design for high performance and low power. Familiarity with NoC technology, AMBA protocols, and coherency protocols is required. Cadence offers competitive compensation, benefits, and opportunities to work on impactful projects.
System Software Architect
Company: Cadence Design Systems
Location: South Bay
Posted Apr 15, 2024
<p><strong><b>At Cadence we hire and develop leaders and innovators who want to make an impact on the world of technology<b><strong> <p> <p>The Cadence Compute Systems Group CSG develops and licenses IP for system designs This includes CPUs and highperformance DSPs DDR and IO controllers hardware accelerators and subsystems Our IP designs are used by most of the top semiconductor vendors today and our customers are shipping billions of chips annually using our components <p> <p>The CSG Central Applications Engineering team seeks an experienced motivated technical manager to lead a new software team for CSG systems You will lead a team implementing reference systems for Computer Vision Machine Learning Radar Automotive and other highperformance applications This is a technically rewarding role with high visibility within the organization The team is responsible for supporting customers of CSG subsystems The group will also develop software and applications for reference systems and product demonstrations highlighting the capability of CSG subsystems and components This is a handson role working with compute and interface IP device drivers and RTOS communication libraries and APIs reference designs boards and emulation systems <p> <p>This position requires technical expertise in developing complex software for embedded realtime and multiprocessor systems The role also requires good experience in group management project planning and quality software development You will work closely with Cadence RampD engineering marketing partners and customers <p> <p><strong><b>Key Responsibilities<b><strong> <p> <ul><li>Recruit train and manage a strong team of software developers<li> <li>Develop reference applications to showcase Cadence IP and subsystems Participate in trade shows and customer meetings as required Typical applications address Computer Vision Machine Learning Automotive and Audio verticals<li> <li>Develop reference designs on different hardware targets collateral and training material for CSG system customers Build and train an organization to support users<li> <li>Port and integrate CSG software components for reference systems and platforms and create development SDK for partners and customers<li> <li>Develop at all levels of device software for IO interfaces like HDMI PCIe and UCIe on embedded systems with and without OSes<li> <li>Coordinate with partners to integrate 3rd party components and applications with CSG systems<li> <ul><p><strong>What we are looking for in a Candidate<strong> <p> <ul><li>Exceptional management and communication skills<li> <li>Expert C coder Proficiency in Python Perl or C++ is a plus<li> <li>Handson experience writing lowlevel software for embedded processors like ARM<li> <li>Handson experience writing driver software for interfaces and peripherals such as HDMI USB PCIe and Ethernet<li> <li>Handson experience in creating embedded Linux distributions<li> <li>Bonus points for experience in porting linking and debugging embedded software and drivers<li> <li>BS in EECS with 10+ years work experience or MS in EECS with 8+ years experience<li> <li>Be able to travel locally andor internationally up to 15 of time for business needs<li> <ul><p>The annual salary range for California is $169400 to $314600 You may also be eligible to receive incentive compensation bonus equity and benefits Sales positions generally offer a competitive On Target Earnings OTE incentive compensation structure Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications skill level competencies and work location Our benefits programs include paid vacation and paid holidays 401k plan with employer match employee stock purchase plan a variety of medical dental and vision plan options and more <p> <p><strong><b>Were doing work that matters Help us solve what others cant<b><strong><p>
Cadence Design Systems - Software Verification Engineer – New College Grad 2024
Company: Cadence Design Systems
Location: San Jose, CA
Posted Mar 22, 2024
Job posting for a Software Verification Engineer position at Cadence Design Systems in San Jose, CA, targeting new college graduates in 2024.