Principal Design Engineer

Microsoft Peninsula

Company

Microsoft

Location

Peninsula

Type

Full Time

Job Description

Microsoft is a leader in the design of world-class entertainment devices. We are looking for a Principal Design Engineer to work in the dynamic Microsoft Silicon team, working on custom and semi-custom Application Specific Integrated Cirtuit (ASICs) for Microsoft Cloud. The candidate must be a highly motivated, self-starter who will thrive in this cutting-edge technical environment.

You will be part of the design team, driving many facets of high performance, high bandwidth designs. The tasks will include working with architecture teams on Intelectual Property (IP) requirements, Register Transfer Level (RTL) design, synthesis, static timing analysis, and silicon validation. You will be responsible for working with verification and physical design teams ensuring that IP is implemented and verified to the spec.

Microsoft's mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.

Responsibilities:

  • Experience in designing IP and completing System on Chip (SoC) tape outs in deep sub-micron technologies.
  • Expertise in digital design including microarchitecture specification development, RTL coding in Verilog and familiar with LINT and Clock Domain Crossing (CDC) closure.
  • Experience with System-on-a-chip fabric technologies for connecting multiple initiator and targets via advanced Microcontroller Bus Architecture-Advanced extensible Interface (AMBA AXI) and similar interfaces a requirement
  • Hands on experience with Arteris Flex Network on Chip (NoC) a big plus
  • Expertise in high-speed digital design including specification development, RTL design, synthesis and static timing signoff required
  • Knowledgeable in one or more industry standard interfaces such as AMBA AXI protocol
  • Experience in chip design quality tapeout through design and checklist reviews
  • Communication skills and the ability to facilitate collaboration across Microsoft internal groups and external vendors.
  • Requires occasional travel

Qualifications:

Required/Minimum Qualifications

  • 9+ years of related technical engineering experience

    o OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience or internship experience

    o OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience

    o OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience.
  • 5+ years of technical design experience
  • 5+ years of experience of micro-architecture, including general knowledge in areas such as processors, Direct Memory Access (DMA) blocks, memory hierarchies, fabrics, and generic industry standard interfaces.

Background Check Requirements:

Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to, the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud background check upon hire/transfer and every two years thereafter.

Preferred Qualifications

  • 5+ years of industry experience with logic design flow (including RTL entry and simulation, synthesis, basic floor-planning, timing constraints, timing closure, and post-silicon debug)
  • Experience in development planning with inputs from multiple stakeholders as well as the development team, then tracking, reporting, and identifying mitigation steps as needed to adhere to the project schedule

Silicon Engineering IC5 - The typical base pay range for this role across the U.S. is USD $133,600 - $256,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $173,200 - $282,200 per year.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: https://careers.microsoft.com/us/en/us-corporate-pay

Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the Accommodation request form.

Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.

Date Posted

04/13/2023

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