Principal Design Engineer

Microsoft's mission is to empower every person and every organization on the planet to achieve more. Join us to achieve this by building the world's computer. The Artificial Intelligence Silicon Engineering team is seeking Principal Design Engineer to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge AI designs that can perform complex and high-performance functions in an extremely efficient manner.

We are looking for a Principal Design Engineer to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon team. The candidate should be a motivated self-starter who will thrive in this cutting-edge technical environment. You will be part of the design team, driving many facets of high performance, high bandwidth designs.

Qualifications:

Required/Minimum Qualifications

• 9+ years of related technical engineering experience

o OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience or internship experience

o OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience

o OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience.

• 9+ years expertise in Digital Design including microarchitecture specification development, RTL coding in Verilog/System Verilog, Design Verification collaboration, and Clock Domain Crossing (CDC)/LINT closure.
• 9+ years of experience in Synthesis, Timing constraints, Power, Performance, Area (PPA) trade-offs and Post-Silicon Debug
• Experience in one or more of the following - Floating point arithmetic and datapath design, high performance DMA design, subsystem designs/integration and custom logic design

Other Requirements:

Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to, the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud background check upon hire/transfer and every two years thereafter.

Additional or Preferred Qualifications

• 15+ years of industry experience in logic design with leadership experience and a proven track record of delivering complex solutions
• Track record of successful ASIC tape outs in deep sub-micron technologies
• Scripting language such as Python or Perl
• Substantial background in debugging designs as well as simulation environment
• Knowledge of verification principles, testbenches, (Universal Verification Methodology) UVM, and coverage
• Working knowledge of writing assertions, coverage and formal verification.
• Proficient leadership skills
• Proficient communication, collaboration and teamwork skills and ability to contribute to diverse and inclusive teams

Silicon Engineering IC5 - The typical base pay range for this role across the U.S. is USD $133,600 - $256,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $173,200 - $282,200 per year.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here : https://careers.microsoft.com/us/en/us-corporate-pay

Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the Accommodation request form .

Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.

Responsibilities:

• Establish yourself as an integral member of a digital logic design team for the development of AI components with focus on micro-architectural based functions and features.
• Responsible for the logic design/ Register-Transfer Level (RTL) entry, design quality (LINT, CDC, RDC, power etc.) and timing closure of high performance digital Intellectual Property (IP)
• Collaborate with the verification team to ensure the implementation meets both architectural and micro-architectural intent.
• Interface with physical design, design for test, and other teams to optimize tradeoffs within the design.
• Provide technical leadership through mentorship and teamwork.