Senior Debug Validation Engineer

· Remote

Location

Remote

Type

Full Time

Job Description

GraphcoreJobs
Senior Debug Validation Engineer

Senior Debug Validation Engineer

Posted Yesterday
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Austin TX USA
Hybrid
Senior level
Artificial Intelligence • Semiconductor
Joining Graphcore gives you a seat at the top-table shaping the future of Artificial Intelligence.
The Role
Lead post-silicon debug and validation for AI compute silicon and platforms. Drive investigation and resolution of complex silicon firmware software and system-level issues develop debug methodologies enhance automated debug and validation infrastructure analyze logs/traces/telemetry define validation metrics and communicate technical risks to leadership to ensure product readiness.
Summary Generated by Built In
About us

Graphcore is one of the world’s leading innovators in Artificial Intelligence compute.
It is developing hardware software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry.

As part of the SoftBank Group Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone.

Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists silicon designers software engineers and systems architects Graphcore enjoys a culture of continuous learning and constant innovation.

Job Summary

Reporting to senior leadership within Architecture and Validation the Debug Validation Engineer will drive post-silicon debug and validation activities for next-generation AI compute silicon and systems. The role is responsible for leading teams focused on identifying reproducing analysing and resolving complex silicon firmware and system-level issues during bring-up characterization and product readiness.

This position combines deep technical debugging expertise with strong cross-functional collaboration across multiple engineering disciplines. The role will work closely with architecture RTL firmware software and systems teams to improve debug methodologies accelerate issue resolution and strengthen validation coverage. The role will work closely with architecture RTL firmware software systems and platform teams to improve debug methodologies accelerate issue resolution and strengthen validation coverage.

The Team

The Post-Silicon Debug and Validation team sits within the Architecture and Validation organisation and is responsible for bring-up debug and validation of Graphcore silicon and systems.

The team works across the full product lifecycle supporting first silicon bring-up subsystem validation system integration and production readiness activities. Engineers collaborate closely with hardware firmware software and systems teams to investigate complex failures develop debug methodologies and improve validation infrastructure.

Responsibilities and Duties
  • Lead post-silicon debug and validation activities for AI compute silicon and platform technologies
  • Contribute to debug and validation activities across multiple projects and milestones
  • Drive prioritisation planning and execution of debug and validation activities across multiple projects and milestones
  • Investigate and resolve complex silicon firmware software and system-level issues during bring-up and validation
  • Develop structured debug methodologies and failure analysis processes to improve issue resolution efficiency
  • Collaborate closely with architecture RTL firmware software and systems engineering teams to identify root causes and implement corrective actions
  • Drive debug of CPU memory interconnect and high-speed I/O subsystems under functional stress and workload conditions
  • Develop and enhance automated debug regression and validation infrastructure using Python and related technologies
  • Analyse logs traces telemetry and hardware data to isolate and characterize system failures and performance issues
  • Support development of validation tests debug tooling and custom diagnostics to improve coverage and observability
  • Define validation metrics debug workflows and reporting standards to ensure consistent and repeatable analysis
  • Drive continuous improvement of debug processes validation methodologies and engineering workflows
  • Communicate technical risks status and recommendations clearly to engineering leadership and cross-functional stakeholders
  • Support silicon readiness reviews and contribute to product quality and release decisions
  • Contribute to continuous improvement of debug methodologies validation infrastructure and engineering workflows
Candidate ProfileEssential:
  • Strong experience in bare metal environments
  • Good knowledge of SoC and platform architectures
  • Expertise in debug infrastructure and post-silicon debug methodologies
  • Strong programming skills in Python C or debug scripting languages such as CMM
  • Highly motivated self-starter with a collaborative and team-oriented approach
  • Ability to work across teams and programming languages to identify root causes of deep and complex issues
  • Experience of the post-silicon validation process applied in digital ASIC environments
  • Strong Linux and Python experience
  • Exceptional communication skills and the ability to collaborate effectively to solve complex problems
  • Excellent problem-solving analytical and diagnostic skills
  • Deep knowledge of scan DFT JTAG and trace infrastructure
  • Strong debug skills including fault tree analysis failure isolation fishbone methodologies and system-level debug techniques
  • Ability to work independently on technically complex debug and validation activities across hardware firmware and software domains
Desirable
  • Understanding of DFT flows from insertion through post-silicon validation
  • Experience developing tooling for parsing and analysing debug data including scan dump parsing
  • Driver-level experience with one or more of the following technologies:
    • PCIe
    • Ethernet
    • Memory technologies including LPDDR DDR and HBM
    • Peripheral interfaces such as I2C I3C and SPI
  • Experience using CoreSight and similar debug infrastructure including CTI ETx DStream JLink Lauterbach ATB and STM
  • Good knowledge of mixed-signal building blocks such as PLLs high-speed PHYs and IC control/communication protocols
  • Experience with Arm CPU architectures system IP and associated debug tooling
  • Experience with AMBA protocols
  • Understanding of ML applications and associated workloads
  • Experience in characterization failure analysis test development statistical analysis and customer support

Benefits
In addition to a competitive salary Graphcore offers flexible working and a comprehensive benefits package designed to support your health wellbeing and financial future. Our benefits include medical dental and vision coverage Flexible Spending Accounts (FSAs) Health Savings Accounts (HSAs) disability and life insurance a 401(k) retirement plan commuter benefits wellness services and an Employee Assistance Programme (EAP). We welcome people of different backgrounds and experiences; we're committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.

Skills Required

  • Strong experience in bare metal environments
  • Good knowledge of SoC and platform architectures
  • Expertise in debug infrastructure and post-silicon debug methodologies
  • Strong programming skills in Python C or debug scripting languages such as CMM
  • Strong Linux experience
  • Experience of the post-silicon validation process applied in digital ASIC environments
  • Deep knowledge of scan DFT JTAG and trace infrastructure
  • Strong debug skills including fault tree analysis failure isolation fishbone methodologies and system-level debug techniques
  • Exceptional communication skills and ability to collaborate across teams
  • Ability to work independently on technically complex debug and validation activities across hardware firmware and software domains
  • Understanding of DFT flows from insertion through post-silicon validation
  • Experience developing tooling for parsing and analysing debug data including scan dump parsing
  • Driver-level experience with PCIe Ethernet memory technologies (LPDDR DDR HBM) and peripheral interfaces (I2C I3C SPI)
  • Experience using CoreSight and similar debug infrastructure (CTI ETx DStream JLink Lauterbach ATB STM)
  • Knowledge of mixed-signal building blocks such as PLLs high-speed PHYs and IC control/communication protocols
  • Experience with Arm CPU architectures system IP and associated debug tooling
  • Experience with AMBA protocols
  • Understanding of ML applications and associated workloads
  • Experience in characterization failure analysis test development statistical analysis and customer support

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The Company
HQ: Bristol
762 Employees
Year Founded: 2016

What We Do

At Graphcore we’re building the future of AI compute. We’re a team of semiconductor software and AI experts with deep experience in creating the complete AI compute stack - from silicon and software to infrastructure at datacenter scale. As part of the SoftBank Group backed by significant long-term investment we are delivering key technology into the fast-growing SoftBank AI ecosystem. To meet the vast and exciting AI opportunity Graphcore is expanding its teams around the world. We are bringing together the brightest minds to solve the toughest problems in a place where everyone has the opportunity to make an impact on the company our products and the future of artificial intelligence.

Why Work With Us

Our team is at the forefront of the machine intelligence revolution enabling innovators from all industries to build AI-native products to expand human potential. What we do at Graphcore really makes a difference.

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Employees engage in a combination of remote and on-site work.

At Graphcore we value wellbeing and flexibility to support a healthy work/life balance. Our hybrid approach encourages office-based colleagues to work onsite three days a week with trusted flexibility built on trust and transparency for everyone.

Typical time on-site: 3 days a week
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Date Posted

06/26/2026

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