Sr. Staff SoC RTL Engineer

Ambiq is on a mission to enable intelligence everywhere by delivering some of the world’s most energy-efficient semiconductor solutions.

Our ultra-low-power MCUs and SoCs power smart wearables medical devices connected sensors and intelligent edge products where performance matters—but every microwatt counts.

We are looking for a Senior Staff SoC RTL Engineer to help architect design and deliver the digital hardware inside our next-generation products.

This is a hands-on individual contributor role for an experienced RTL engineer who wants meaningful ownership across the full silicon lifecycle—from microarchitecture and RTL development through design closure tapeout and silicon bring-up.

• Define the microarchitecture of digital SoC modules and subsystems
• Develop production-quality RTL using Verilog and SystemVerilog
• Own complex blocks from specification through pre-tapeout signoff
• Integrate internal and third-party IP into MCU and SoC platforms
• Work with ARM-based CPU subsystems and AMBA-based interconnects such as AHB APB or AXI
• Partner with verification engineers on test planning debug and coverage closure
• Collaborate with Physical Design teams to resolve timing power area and implementation issues
• Run analyze and resolve LINT CDC and RDC violations
• Support FPGA prototyping silicon bring-up and post-silicon debug
• Contribute to low-power design through clock gating power management and efficient data movement
• Mentor less-experienced engineers and contribute to technical decisions across teams

• Bachelor’s or Master’s degree in Electrical Engineering Computer Engineering or a related field
• 8+ years of hands-on ASIC or SoC RTL design experience
• Strong Verilog and/or SystemVerilog development skills
• Demonstrated ownership of complex digital blocks IPs or subsystems
• Experience creating or contributing to architecture and microarchitecture specifications
• Understanding of front-end ASIC development including synthesis timing LINT CDC and RDC
• Experience working with verification and Physical Design teams through design closure
• Familiarity with ARM-based SoCs CPU subsystems or AMBA protocols such as AHB APB or AXI
• Experience supporting tapeout silicon bring-up or post-silicon debug
• Ability to explain design decisions tradeoffs and technical risks clearly
• Strong problem-solving skills and a willingness to remain hands-on

• ARM Cortex-M or embedded CPU subsystem integration
• MCU architecture and peripheral integration
• AMBA interconnect memory maps DMA interrupt controllers or bus arbitration
• Low-power SoC design including UPF power gating clock gating retention or multi-voltage domains
• Memory controllers DSPs hardware accelerators security blocks or AI-related IP
• FPGA prototyping or emulation
• Third-party IP evaluation and integration
• Multiple successful production tapeouts

At Ambiq you will not disappear into one narrow corner of a massive organization.

You will have the opportunity to:

• Own meaningful portions of real products
• Influence architecture before designs are locked
• Work across the full silicon lifecycle
• Collaborate directly with senior technical leaders
• See your work ship in high-volume customer products
• Help solve some of the hardest power and performance challenges in edge computing

This role is based at Ambiq’s Austin headquarters and requires working onsite five days per week.  Candidates must be currently authorized to work in the United States.

What We Do

Ambiq® enables intelligence (AI and beyond) everywhere by delivering the lowest-power semiconductor solutions for battery-powered edge devices. As a pioneer in ultra-low power SoCs Ambiq empowers wearables IoT smart home healthcare and industrial products with always-on energy-efficient intelligence. Backed by our SPOT® technology and global innovation leadership Ambiq is shaping the future of edge AI.

Why Work With Us

Direct influence on silicon architectureSmaller high-impact teamsHardware/software co-design in real timeFaster technical decision cyclesVisible ownership at Staff & Director levelAustin-based collaboration culture